In the cellular phone service in recent years, since a demand for data communication as well as voice communication has been expanded, improvement of a communication speed is important. For example, in the GSM (Global System for Mobile communications) which has become widespread in mainly European and Asian regions, conventionally, voice communication has been executed in GMSK modulation which shifts the phase of a carrier wave according to transmitted data. Further, an EDGE (Enhanced Data rates for GSM Evolution) system has been proposed in which data communication is made by 3π/8rotating8-PSK modulation (hereinafter abbreviated as 8-PSK modulation) in which bit information for one symbol is enhanced three-times as large as in the GMSK modulation by shifting the phase and amplitude of the carrier wave according to the transmitted data.
In the linear modulating system which gives amplitude changes like the 8-PSK modulation, the requirement of linearity for a power amplifying unit of a radio transmitter is strict. In addition, the power efficiency in a linear operating point of the power amplifying unit is lower than that in a saturated operating point. Therefore, if a convention orthogonal modulating system is applied to a linear modulating system, it was difficult to realize the high efficiency in the power efficiency.
In order to obviate such an inconvenience, there is a previously known system in which a transmitted signal is separated into a constant-amplitude phase signal and an amplitude signal, and a signal is phase-modulated on the basis of the constant-amplitude phase signal by a phase modulator and the constant-amplitude phase-modulated signal having a level at which a power amplifying unit operates in saturation is input to the power amplifying unit and a control voltage of the power amplifying unit is driven at a high speed and the phase modulation is combined with the amplitude modulation. This system is called an EER method (Envelope Elimination & Restoration) or polar modulation system (polar modulation, polar modulating system) which can realize the high efficiency of the power amplifying unit through the linear modulating system) (for example, see Non-Patent Reference 1). In order to clarify that this system is a modulating system different from the orthogonal modulating system, it is called the polar modulating system.
FIG. 11 is a graph in which the amplitude signal in 8-PSK modulation in the range of 200 to 400 [μs] extracted from one time slot (577 [μs]) of GSM is plotted. In FIG. 11, the abscissa represents a passage time from start of the time slot; and the ordinate represents an amplitude of the amplitude signal. In the polar modulating system, the constant-amplitude phase modulated signal is supplied to the power amplifying unit so that the power amplifying unit can be used at the saturation operating point. This is advantageous in the power efficiency.
However, in order to express the amplitude signal in which there is a flexing point between a maximum value and a minimum value within 2 [μs] as in FIG. 11, the control voltage for the power amplifying unit must be driven at a high speed. So, the output response in the power amplifying unit to changes in the input control voltage requires an improving technique (distortion compensating technique).
Further, the polar modulating system is a system in which the transmitted signal is once separated into the amplitude signal and the phase signal and thereafter composed again. Therefore, if synchronization is lost between the amplitude signal and the phase signal until they are recomposed after separated, the transmitted signal cannot be expressed exactly at the time of recomposing. Accordingly, a synchronizing technique for acquiring the synchronization between the amplitude signal and the phase signal is required.
An explanation will be given of prior arts of two techniques required by the polar modulating system hitherto explained.
First, there is a prior art on the distortion compensation and synchronization in the polar modulating system in which in the power amplifying unit in a saturating operation type at a predetermined input high frequency amplitude, the output signal amplitude characteristic (AM-AM: Amplitude Modulation to Amplitude Modulation conversion) and passing phase characteristic (AM-PM: Amplitude Modulation to Phase Modulation conversion) for the control voltage are stored in a memory. In this prior art, the distortion compensation in a pre-distortion system is executed referring to the memory. In addition, after the transmitted signal has been separated into the amplitude signal and the phase signal, a delay adjusting unit is arranged in a path of the amplitude signal or the phase signal to assure the synchronization between both signals (see, for example, Patent Reference 1).
FIG. 12 is a block diagram of a prior art transmission device described in Patent Reference 1. As seen from FIG. 12, this transmission device includes a power amplifying unit (PA) 900, a polar coordinate converting unit 901, a delay adjusting unit 902, a memory 903, an amplitude controller unit 906 having an amplitude information correcting unit 904 and an amplitude modulating unit 905, and a phase modulating signal generator 909 having a phase information correcting unit 907 and a phase modulating unit 908.
The polar coordinate converting unit 901 separates I/Q signals (I, Q) supplied from a baseband signal generating unit not shown into an amplitude signal r and a phase signal θ with a constant amplitude. The delay adjusting unit 902 gives prescribed delays to the input amplitude signal r and phase signal θ, respectively, thereby assuring synchronization between the amplitude signal r2 and phase signal θ2 which are to be outputted. With a predetermined input high frequency signal amplitude being applied to the power amplifying unit 900, the memory 903 stores the AM-AM characteristic and AM-PM characteristic for a control signal to be inputted to the power amplifying unit 900. According to the input amplitude signal r2, the memory 903 also produces an amplitude correction signal and a phase correction signal which provide characteristics reverse to the power amplifying unit 900.
The amplitude information correcting unit 904 makes a correction to the input amplitude signal on the basis of the amplitude correction signal supplied from the memory 903. The amplitude modulating unit 905 drives the control voltage for the power amplifying unit 900 at a high speed on the basis of the output signal from the amplitude information correcting unit 904. The phase information correcting unit 907 makes a correction for the input phase signal on the basis of the phase correction signal supplied from the memory 903. The phase modulating unit 908 makes a phase modulation on the basis of the output signal from the phase information correcting unit 907.
In this way, the amplitude modulated signal and phase modulated signal previously distorted considering the reverse characteristic of the output characteristic for the input control signal to the power amplifying unit 900 are affected by actual distortion in the amplitude and phase generated in the power amplifying unit 900 to provide a desired output amplitude and phase. Thus, the output response (linearity) for the input control voltage can be improved. Further, since synchronization between the amplitude signal and the phase signal can be assured by the delay adjusting unit 902, the transmitted signal can be expressed exactly.
Patent Reference 1, however, does not disclose concrete techniques of distortion compensation and synchronization. Therefore, the technique disclosed in Patent Reference 1 cannot deal with the case where the synchronization between the amplitude signal and the phase signal is lost by any cause.
FIG. 13 is a plotted graph of passing phase characteristics when the control voltage gradually changing (monotonous increase or monotonous decrease) for time passage is applied to the power amplifying unit. In FIG. 13, the abscissa represents a normalized control voltage and the ordinate represents a passing phase rotation with reference to the normalized control voltage of 1. In this figure, the solid line represents the passing phase characteristic when the normalized control voltage is gradually changed from a low voltage (0) to a high voltage (1) in the monotonous increase (ascent-characteristic). Further, the dotted line represents the passing phase characteristic when the normalized control voltage is gradually changed from the high voltage (1) to the low voltage (0) in the monotonous decrease (descent-characteristic). Incidentally, both slid line and dotted line represent the cases where the power amplifying unit is supplied with the input high frequency signal amplitude (same value) in the predetermined level of its saturating operation.
In the polar modulating system, since the control voltage for the power amplifying unit is driven at a high speed, a difference occurs between the charging time and the discharging time of the capacitor (inclusive of a parasitic capacitor) in the unit for supplying the control voltage to the power amplifying unit. Therefore, as shown in FIG. 13, even with the change widths being equal, the quantity of phase change differs between the case where the condition of applying the control voltage changes from the low voltage to the high voltage and the case where it changes from the high voltage to the low voltage. Namely, the phase characteristic changes at a signal changing point. This means that synchronization between the amplitude signal and the phase signal is lost.
Next, an explanation will be given of a prior art of synchronization at the signal changing point in the polar modulating system. As such a prior art, there is a technique of detecting the output signal amplitude in the power amplifying unit and differentiating the detected signal thereby acquiring the signal changing point. In this prior art, after the signal changing point has been acquired, a delay from a reference clock to be supplied to a digital-analog conversion circuit (hereinafter referred to as a DA converter) for converting the amplitude signal and the phase signal from a digital format into an analog format is adjusted. Further, the synchronizing timing at the signal changing point is adjusted (for example, see Patent Reference 2).
FIG. 14 is a block diagram of a prior art transmission device disclosed in Patent Reference 2. As seen from FIG. 14, this transmission device includes a power amplifying unit 900, an amplitude modulating unit 905, a phase modulating unit 908, DA converters 1101, 1102 and a reference clock 1103, a changing point detecting circuit 1104 and a delaying unit 1105.
The DA converter 1101 converts I/Q signals (I,Q) in the digital format supplied from a baseband signal generating unit (not shown) into the I/Q signals in the analog format. The DA converter 1102 converts an amplitude signal (r) extracted from the I/Q signals (I, Q) in the digital signal by a polar coordinate converting unit (not shown) into the amplitude signal in the analog format. The reference clock 1103 supplies a clock which is a reference to the converting operation to the DA converters 1101, 1102.
The amplitude modulating unit 905 drives a power supply voltage to the power amplifying unit 900 at a high speed. The phase modulating unit 908 generates a phase modulated signal on the basis of the I/Q signals in the analog format, which is sent to the power amplifying unit 900. The changing point detecting circuit 1104 differentiates the output signal from the power amplifying unit 900 and thereafter detects the signal changing point according to whether the differentiated value is positive or negative. At the signal changing point detected by the changing point detecting circuit 1104, the delaying unit 1105 adjusts the converting timings in the DA converters 1101 and 1102, i.e. the synchronization between the amplitude signal and phase signal extracted from the I/Q signals. In this configuration, the signal changing point can be detected and the synchronization between the amplitude signal and the phase signal can be assured at the signal changing point detected.
Patent Reference 1: JP (Tokuhyou) 2004-501527 (FIG. 11)
Patent Reference 2: JP (Tokuhyou) 2002-530992 (FIG. 2)
Non-Patent Reference 1: Kenington, Peter B, “High-Linearity RF Amplifier Design”, Artech House Publishers (p 162, FIGS. 4, 18)